8 independent internal banks 
        
              
          8-bit pre-fetch 
        
              
          800MHz fCK for 1600Mb/sec/pin 
        
              
          Asynchronous Reset 
        
              
          Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°Cº 
        
              
          Bi-directional Differential Data Strobe 
        
              
          Burst Length 
        
              
          Internal (self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%) 
        
              
          JEDEC 1.5V Power Supply 
        
              
          On Die Termination using ODT pin 
        
              
          PCB: Height 1.180” (30.00mm), double sided component 
        
              
          Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 
        
              
          Programmable CAS latency: 11, 10, 9, 8, 7, 6, 5 
        
              
          VDDQ = 1.5V